Seminar Details
2026-02-12 (13:00) : Mixed-signal neuromorphic circuits and systems for extreme-edge computing
At Nyquist
Organized by Electrical Engineering
Speaker :
Dr. Ariana Rubino (ETH Zurich)
Abstract :
Brain-inspired computing architectures offer a promising solution for
integrating Internet of Things (IoT) sensors with intelligent local
processing in edge computing applications. In particular, mixed-signal
event-based neuromorphic designs inherently meet key requirements of
edge computing: power efficiency, compactness, low latency, real-time
processing, and adaptability via on-chip learning.
Despite these advantages, several challenges remain. These include the
development of powerful and effective spike-based learning mechanisms,
the adoption of advanced Complementary metal-oxide-semiconductors (CMOS)
technology nodes, and the significant silicon area required to implement
neural dynamics with long time constants and synaptic plasticity.
In my talk, I will showcase the research conducted during my PhD to
advance the state of the art in mixed-signal neuromorphic processors for
edge computing. In particular, I will highlight the potential of
multi-compartment neuron models to enable dendritic spike-based learning
rules driven by target activities - an approach well suited to compact
and resource constrained edge devices. To support the development of
more compact and low-power systems, and to address the limitations of
scaled bulk-CMOS technologies, I will present our investigation into
Fully Depleted-Silicon on Insulator (FDSOI) transistor technology for
neuromorphic circuit design, demonstrating improved energy efficiency,
reduced mismatch, and better support for long synaptic dynamics.
Finally, to further optimize compactness at the synaptic array, I will
discuss emerging memory technologies, with a focus on energy-efficient
edge-compatible Ferroelectric Tunneling Junction (FTJ) memristive
synapses.
For each of these three aspects, I will present the mixed-signal
neuromorphic processors I designed and/or contributed to - ranging from
prototype test platforms to large-scale multi-core architectures - along
with both circuit-level simulation results and chip-level measurement
data.