All Years Seminars
[INMA] 2025-10-14 (14:00) : Newcomers seminars (PhDs)
At Euler building (room a.002)
Section 1:Low-rank PSD matrix completion
Speaker :
Sophie Lequeu (PhD UCLouvain/INMA)
Abstract : While convexity is traditionally seen as essential for solving optimization problems, many nonconvex ones pose no significant issues in practice. Moreover, simpler nonconvex formulations are generally more compact and amenable to parallel solving, even when an equivalent convex formulation exists. This justifies the interest in studying the global landscape of selected optimization problems, in order to determine the characteristics that distinguish problems with benign nonconvexity from those with non-benign nonconvexity.
In this research project, we will study the Burer–Monteiro nonconvex reformulation of the low-rank PSD matrix completion problem. For sparsity patterns corresponding to chordal graphs, a classical result guarantees the existence of a low-rank solution, encouraging the use of this reformulation. The goal is to determine conditions under which this formulation has no spurious local minima, by studying characteristics of the sparsity pattern.
Section 2:Novel deep learning architectures for the detection of the stochastic gravitational wave background.
Speaker :
Antonin Oswald (PhD UCLouvain/INMA)
Abstract : We propose to advance the understanding of the stochastic gravitational wave background by proposing new machine learning architectures specifically dedicated to processing correlation matrices signal representations. These architectures will heavily rely on the geometry of the manifold of positive-definite matrices, to which the correlation matrices representing classically the signal rely. We will explore several directions, aiming to account for time- and frequency dependency in the correlation representations. We will then use our proposed novel architectures for denoising correlation matrices in view of subsequent SGWB detection.
Section 3:Path-complete reinforcement learning
Speaker :
Lea Ninite (PhD UCLouvain/INMA)
Abstract : Reinforcement Learning (RL) has achieved remarkable success in complex control tasks, yet its lack of theoretical guarantees limits its use in safety-critical systems. In RL, the Q-function satisfies a decrease condition similar to that of a Lyapunov function, but this relation is typically enforced through heuristic, data-driven updates, which hinders robustness and interpretability. In contrast, Path-Complete Lyapunov Functions (PCLFs) offer a systematic and combinatorial framework for encoding stability through sets of local decrease conditions on a graph structure.
This PhD project aims to bridge these two paradigms by developing a Path-Complete Reinforcement Learning (PCRL) framework, introducing a path-complete relaxation of the Bellman equation. As a first step, we focus on computing an upper bound of the value function for arbitrarily switched linear systems using path-complete graphs, where each node encodes a quadratic function satisfying Bellman-like inequalities. Preliminary results show that this construction can yield tight upper bounds on the true value function, highlighting the potential of path-complete methods to bring theoretical structure to learning-based control.
[INGI] 2025-10-09 (13:00) : Sloth: A Kernel-Bypass Scheduler Maximizing Energy Efficiency under Latency Constraints
At Shannon room, Maxwell building
Speaker :
Clément Delzotti (ICTEAM/UCLouvain)
Abstract : The continuously increasing network speeds make packet processing on CPUs increasingly challenging. At a line rate of 100 Gbps, today’s CPUs struggle to execute complex network functions. This trend calls for offloading packet processing to other devices. This work explores how Graphical Processing Units and programmable Network Interface Cards can be used instead of a general-purpose CPU for packet processing. GPUs have been proposed to accelerate network processing thanks to their massively parallel architectures. Recent NICs provide tighter integration with GPUs, with the ability to write received packets directly to GPU memory. Recent SmartNICs, or DPUs, can also receive packets to their own memory and process them with embedded ARM or RISC processors. Such improvements allow bypassing the CPU entirely by processing packets only on the GPU cores or on the SmartNIC’s cores.
In this work, we review various models for packet (co-)processing applied to Network Function Virtualization, including CPU+GPU hybrid, SmartNIC-only, and GPU-only approaches. We introduce a novel communication model between
CPU cores and the GPU, enabling scalable CPU-GPU hybrid utilization while minimizing CPU resources needed. We show that for a computation-heavy workload, current CPU-only implementations manage to handle up to 45 % of the 100 Gbps line rate. In contrast, GPU implementations can saturate it. We also show that recent SmartNICs are getting powerful cores that can replace the main CPU for some traditional packet processing, alleviating the load on the host, which can now entirely be dedicated to running applications. We finally propose a novel energy-efficiency aspect, showing that GPUs and DPUs outperform traditional CPUs by 2 to 3× in terms of Joules/packet.
[INGI] 2025-10-09 (13:00) : Sloth: A Kernel-Bypass Scheduler Maximizing Energy Efficiency under Latency Constraints
At Shannon, Maxwell a.105
Speaker :
Clément Delzotti (ICTEAM/UCLouvain)
Abstract : In recent years, multi-hundred-gigabit networking
applications such as Virtual Network Function (VNF) and Key
Value Store (KVS) implementations have relied on kernel-bypass
and polling to achieve maximum throughput. However, this
performance improvement comes at the expense of high CPU
usage and power consumption.
This paper first analyses the trade-off between the power
consumption, the latency and the throughput of VNF applica-
tions. We then present Sloth, an energy-aware scheduler that
adapts the number of cores used by an application and their
frequency. Sloth uses the information gathered in a training phase
to maximize the energy reduction in real time while maintaining
a user-provided service-level objective. Sloth manages to reduce
CPU power consumption by up to 50% compared to the classical
DPDK polling approach with only a 30 μs latency increase. Sloth
also saves up to milliseconds of latency compared to state-of-the-
art solutions at equivalent power consumption
[INMA] 2025-10-08 (14:00) : Internal Optimization Seminar
At Euler building (room A.002)
Speaker :
No author specified
Abstract :
This is a weekly seminar which explores cutting-edge research and applications in mathematical optimization, spanning theory, algorithms, and real-world problem-solving. Each session features talks from leading researchers, practitioners, or graduate students, covering various topics. Attendees include mathematicians, engineers, and data scientists — all united by a passion for optimization. Open to all. No registration required.
[INMA] 2025-10-07 (14:00) : Communication-efficient distributed optimization algorithms
At Euler building (room A.002)
Speaker :
Laurent Condat (King Abdullah University of Science and Technology (KAUST))
Abstract :
In distributed optimization and machine learning, a large number of machines perform computations in parallel and communicate back and forth with a server. In particular, in federated learning, the distributed training process is run on personal devices such as mobile phones. In this context, communication, that can be slow, costly and unreliable, forms the main bottleneck. To reduce it, two strategies are popular: 1) local training, which consists in communicating less frequently; 2) compression. Also, a robust algorithm should allow for partial participation. I will present several randomized algorithms we developed recently, with proved convergence guarantees and accelerated complexity. Our most recent paper “LoCoDL: Communication-Efficient Distributed Learning with Local Training and Compression” has been presented as a Spotlight at the ICLR conference in April 2025.
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